ASRock Rack GENOA2D24G-2L+ Dual EPYC Motherboard Guide

The ASRock Rack GENOA2D24G-2L+ is a dual socket SP5 server motherboard for AMD EPYC processors, and it is built around a design decision that separates it from most boards in its class: almost every PCIe lane leaves the board through MCIO connectors rather than physical slots.

That makes it a board for people building into a specific chassis with a specific cabling plan, and a poor fit for anyone expecting to drop in standard add-in cards. This guide covers what it supports, what the connector layout means in practice, and what else the build needs.

Specifications

Sockets. Dual Socket SP5 (LGA 6096), supporting AMD EPYC 9005 and 9004 series including models with 3D V-Cache, and the 97x4 series.

Memory. 24 DIMM slots in a 12 plus 12 layout, one DIMM per channel, taking DDR5 RDIMM and RDIMM-3DS.

Expansion. 20 MCIO connectors in total: 12 at PCIe 5.0 / CXL 2.0 x8, four at PCIe 5.0 / CXL 2.0 x8 that can alternatively provide eight SATA 6Gb/s ports each, two at PCIe 5.0 x8 that can alternatively provide eight SATA each, and two at PCIe 5.0 x8.

Storage. Two M.2 slots at PCIe 3.0 x4 or SATA 6Gb/s, plus up to 34 SATA 6Gb/s connections drawn from the switchable MCIO connectors.

Networking. Two RJ45 gigabit ports on an Intel i350 controller.

Management. Onboard BMC with IPMI remote management.

Form factor. Proprietary, 16.93 by 13.78 inches.

The memory layout is the headline

Twenty-four slots across two sockets is twelve per socket, which matches the twelve memory channels each EPYC 9004 and 9005 processor provides. One DIMM per channel, every channel populated, no second slot per channel.

That is a deliberate choice and it has a clear consequence. You cannot add capacity later by filling a second slot on a channel, because there is not one. Every channel is populated from the start or it is empty, and capacity upgrades mean replacing DIMMs with larger ones rather than adding more.

What you get in exchange is the platform's full memory bandwidth without the speed penalty that comes from populating two DIMMs per channel. For memory-bandwidth-sensitive work — simulation, in-memory databases, large model inference — that is the correct trade.

Two practical notes. Populate all twelve channels per socket wherever the budget allows, because an EPYC with half its channels filled loses bandwidth out of proportion to the capacity saved. And plan capacity on the DIMM size, not on the slot count, since the slot count is fixed. Our guide to sizing server memory covers how to work out what the workload actually needs.

MCIO instead of slots

This is the part that determines whether the board suits your build, and it is where most of the confusion around it comes from.

There are no conventional PCIe slots for add-in cards. Twenty MCIO connectors at x8 each expose 160 PCIe 5.0 lanes, which is what a dual EPYC configuration makes available after the inter-socket link takes its share. Everything reaches the board over a cable.

The advantages are real in a purpose-built system. Cabled PCIe routes lanes anywhere in the chassis rather than only to the slot positions a board layout dictates, which is how dense NVMe backplanes and multi-GPU trays get fed. It also avoids the signal integrity limits that constrain long PCIe 5.0 traces across a large board.

The cost is that nothing plugs in directly. A standard PCIe card needs an MCIO to slot adapter and the cable to feed it. An NVMe backplane needs MCIO to backplane cables matched to that backplane. Each connection is a separately specified part, and cable length, direction and connector orientation all matter.

Budget for cabling as a real line item rather than an afterthought. On a board with twenty MCIO connectors the cable count and cost are significant, and the wrong cable is a build that does not finish. Our guide to server storage cables and connectors covers how these are specified.

Where the SATA ports come from

The figure of up to 34 SATA connections is accurate but conditional, and worth understanding before planning storage around it.

Six of the MCIO connectors are switchable. Each can operate as PCIe 5.0 x8 or as eight SATA 6Gb/s ports, not both. Configuring for maximum SATA means giving up those PCIe lanes.

So the board is either a high-lane-count PCIe platform or a high-port-count SATA platform, along a sliding scale between them. Decide which before ordering cables, because the cable type differs by mode.

For most current builds on this class of hardware the PCIe configuration is the one that makes sense, with storage on NVMe rather than SATA. The SATA capability suits a bulk capacity tier alongside an NVMe performance tier.

CXL 2.0 on sixteen connectors

Sixteen of the twenty MCIO connectors support CXL 2.0 alongside PCIe 5.0, which is a forward-looking capability rather than something most builds will use on day one.

CXL allows memory attached to a device to be addressed by the processor as though it were system memory, which matters for workloads that need more memory capacity than DIMM slots allow — and on a board with one DIMM per channel and no expansion room, that is a relevant escape route.

Worth knowing it is there. Not a reason to choose the board unless the roadmap specifically calls for it.

What else the build needs

A proprietary form factor board at 16.93 by 13.78 inches does not go into a standard chassis, and this is the most common point of failure in a build like this.

Confirm before ordering: the chassis is qualified for this board or its mounting pattern matches; the power supply provides the connectors the board expects at sufficient wattage for two EPYC processors plus twenty-four DIMMs plus whatever hangs off the MCIO connectors; the heatsinks are SP5 and rated for the TDP of the processors chosen; and the chassis airflow is designed for passive server heatsinks rather than case fans.

SP5 processors at the top of the range carry high TDPs, and heatsink selection is not interchangeable across sockets or TDP bands. Our racking guide covers the physical side, and understanding server part numbers covers reading the suffixes that carry these differences.

Confirm the suffix

ASRock Rack currently lists this board as the GENOA2D24G-2L+, with the plus as part of the name.

If you are working from a reference to a bare GENOA2D24G-2L — in an older quote, a parts list or a search — confirm the exact suffix against the board itself or against the supplier's part number before ordering. Suffixes in this family carry processor support and feature differences, and a board that looks like a match by name may not be one.

This is the same discipline that applies across server hardware: quote and order against the full part number, never the model name alone.

Who this board is for

It suits a dual EPYC build where the chassis, backplane and cabling are being specified together — dense NVMe storage nodes, multi-GPU systems, HPC and simulation nodes, memory-bandwidth-bound workloads.

It is the wrong choice where you want to drop in standard add-in cards without cabling work, where the chassis is already fixed and not qualified for a proprietary board this size, or where a single socket platform would meet the requirement at considerably lower total cost.

Sourcing

We source server motherboards, EPYC processors, DDR5 registered memory and the cabling to go with them against exact manufacturer part numbers, with condition stated on every line.

Send the full build — board, processors, memory configuration, chassis and what is hanging off the MCIO connectors — and we will quote it line by line and flag anything that will not fit together before it ships. Use the bulk quote page or email sarah.jane@techsellerusa.com.

Common questions

Send us the full build and we will flag anything that will not fit together before it ships.